1 may - 24- 2001 n-channel logic level enhancement mode field effect transistor p70n02l s to-263 ( d 2 pak ) niko-sem a b s o l u t e ma x i mu m r a t i n g s ( t c = 25 c un less o t h e rw ise no t e d ) pa ra m e t e rs/t est condit i ons sy m b ol lim i t s unit s g a te- s our c e voltage v gs 20 v t c = 25 c 70 continuous dr ain cur r ent t c = 100 c i d 45 puls ed dr ain cur r ent 1 i dm 170 avalanc he cur r ent i ar 60 a avalanc he ener gy l = 0.1m h e as 140 repetitive avalanc he ener gy 2 l = 0.05m h e ar 5.6 mj t c = 25 c 65 pow e r dis s i pation t c = 100 c p d 38 w o per ating j unc tion & stor age t e m per atur e range t j , t stg -55 to 150 lead t em per atur e ( 1 / 16 ? f r o m ca se fo r 1 0 se c. ) t l 275 c th erm a l resist a nce ra t i ng s t h erm a l resist a nce sy m b o l t y pica l m a xim u m unit s j unction-to-case r jc 2.3 j unction-to-ambient r ja 62.5 cas e-to-heatsink r cs 0.6 c / w 1 puls e w i dth lim ited by m a x i m u m j unc tion tem per atur e. 2 d u t y cy cl e 1 elect r ica l cha ra ct erist i cs (t c = 25 c, un less o t h e rw ise no t e d ) lim i t s para m e t e r sy m b ol t est condit ions mi n t y p ma x unit st a t ic dr ain- sour c e br eak dow n voltage v (br)dss v gs = 0v, i d = 250 a 25 g a te t h r e s hold voltage v gs(th ) v ds = v gs , i d = 250 a 1 1.5 3 v g a te- b ody leak age i gss v ds = 0v, v gs = 20v 250 na v ds = 20v, v gs = 0v 25 ze r o g a te voltage dr ain cur r ent i dss v ds = 20v, v gs = 0v, t j = 125 c 250 a 1. g a t e 2. drain 3. source product sum m a ry v (br)dss r ds(on) i d 25 7m 70a g d s http://
2 may - 24- 2001 n-channel logic level enhancement mode field effect transistor p70n02l s to-263 ( d 2 pak ) niko-sem o n - s tate dr ain cur r ent 1 i d(on) v ds = 10v, v gs = 10v 70 a v gs = 10v, i d = 30a 7 9 dr ain- sour c e o n - s tate r e si st a n ce 1 r ds(on) v gs = 7v, i d = 24a 8 10 m f o r w ar d t r ans c onduc tanc e 1 g fs v ds = 15v, i d = 30a 16 s dynamic input capac itanc e c is s 2700 o u tput capac itanc e c oss 500 rever s e t r ans f e r capac itanc e c rss v gs = 0v, v ds = 15v, f = 1mhz 200 pf t o tal g a te charge 2 q g 25 g a te- s our c e char ge 2 q gs 7 g a te- d r a in char ge 2 q gd v ds = 0.5v (br)dss , v gs = 10v, i d = 35a 11 nc t u rn -on de l a y t i m e 2 t d(on ) 7 ri s e t i m e 2 t r v ds = 15v, r l = 1 7 t u rn -of f de l a y t i m e 2 t d(off) i d ? 30a, v gs = 10v, r gs = 2.5 24 f a ll t im e 2 t f 6 ns source-dra in diode ra t i ngs a nd cha ra ct erist i cs (t c = 25 c) continuous cur r ent i s 70 puls ed cur r ent 3 i sm 170 a f o r w ar d voltage 1 v sd i f = i s , v gs = 0v 1.3 v rev e rs e rec o v e ry t i m e t rr 37 ns peak rever s e rec over y cur r ent i rm(rec) i f = i s , dl f /dt = 100a / s 200 a rever s e rec over y char ge q rr 0.043 c 1 pulse tes t : puls e w i dth 300 se c, d u t y cy cl e 2 . 2 independent of oper ating tem per atur e. 3 puls e w i dth lim ited by m a x i m u m j unc tion tem per atur e. rem a rk: t h e product m a rked w i t h ? p 70n02ls? , da t e code or lot #
3 may - 24- 2001 n-channel logic level enhancement mode field effect transistor p70n02l s to-263 ( d 2 pak ) niko-sem to-263 (d 2 pa k) mecha nica l da ta mm mm d i m ensi on m i n. t y p. max. d i m ensi on m i n. t y p. m a x . a 14.5 15 15.8 h 1.0 1.5 1.8 b 4.2 4.7 i 9.8 10.3 c 1.20 1.35 j 6.5 d 2.8 k 1.5 e 0.3 0.4 0.5 l 0.7 1.4 f - 0 .102 0.203 m 4.83 5.08 5.33 g 8.5 9 9.5 n
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